1510, 2017

Workshop on Non-conventional Approaches to Hard Optimization (NAHO)

I’m the publicity chair in the Workshop on Non-conventional Approaches to Hard Optimization (NAHO). We are calling for participation and poster presentation. NAHO is co-located with ICCAD, November 16, 2017, in Irvine, CA.
https://iccad.com/event_details?id=242-6-W
https://naho.nd.edu/
Hard optimization and constraint satisfaction problems, as one of the ultimate challenges to computing systems, is benefiting from […]

1312, 2016

Optimal data structure for the Breath First Search algorithm in graphs

Here is the first post of the performance series in C++. In this series, I will write about how to improve the performance of frequently used algorithms in C++ by writing efficient code. I chose C++ because it gives a lot of control over the performance, but same concepts […]

805, 2016

Counting bit set

In EDA, and many other fields, one of the recurring problem is counting the number of set bits in an integer or bitset. For example, in Urbana, our randomized SAT solver, we routinely have to check how many unsatisfied clauses we have to check how far we are from the […]

2501, 2016

Why 2^4=4^2?

Symmetry is a beautiful thing. Doesn’t matter if it is art, nature on just numbers. Symmetry brings a certain degree of order, to otherwise chaotic and random world. The most symmetrical equation I ever observed was the simple equality .

Such beautiful equation cannot be random, there must be a reason […]

1011, 2015

Visually-weighted plots

Ever since I saw Andrew Gelman’s post on visually-weighted regression plotsĀ I knew I wanted to try something similarĀ in one of my plots. What I like the most about those watercolors is the sense of isolation and simplicity they provide without over-burdening the reader.

Yesterday, I was working on the convergence plot […]

2909, 2015

Our paper on test compression was accepted in ASP-DAC 2016.

Our paper, titled “Compressing Analog Tests One-at-a-time to Lower Production Costs”, was accepted to the 21st Asia and South Pacific Design Automation Conference (ASP-DAC 2016). This was a work in collaboration with Suriyaprakash Natarajan from Intel.

Here is the abstract of the paper:
Minimizing the manufacturing test time for ICs is […]

209, 2015

Automated Transient Input Stimuli Generation for Analog Circuits

Our paper, Automated Transient Input Stimuli Generation for Analog Circuits, was accepted in IEEE Transaction on CAD. This was a joint work with my advisor Shobha Vasudevan.
A pre-print of the paper can be downloaded from here or the publication page. The source code of the tools developed for and used […]

1303, 2015

Latex on a diet

Many conferences and journal, at least in my field, impose a restriction on the number of pages of the manuscript. I personally don’t agree with the current practice of limiting the page number of manuscript. Although this is somehow understandable for printed journals, this is a totally unnecessary restriction for […]