Adel Ahmadyan
Computer vision researcher
2011-2017: Ph.D. School of ECE, University of Illinois at Urbana-Champaign, Urbana, USA, under supervision of Prof. Vasudevan.
2009-2011: M.S. in computer architecture from Sharif university of technology, computer engineering department, (GPA:18/20)
2005-2009: B.S. in computer engineering from Sharif university of technology, (GPA:16.2/20).

Research Interest

  1. Computer vision and Multiview geometry
  2. Optimization
  3. Deep learning>
Extensive and diverse machine learning/software development/mathematical modeling experience (C++/Python/Java) with system/hardware background.

Research interest in computer vision and multiview geometry with focus on optimization. Expert in optimization and  randomized algorithms and nonconvex optimization. Wrote a Ph.D. thesis in random tree sampling algorithms for testing and optimization of nonlinear systems.

Master in Computer Architecture. I can develop high-performance and memory efficient software. Passionate about performance, scalability and solving complex problems.

Professional Experience

  • Ansys

    Intern, Summer-2014

  • BSI Financial Group

    Reliability Expert, 2011


    Intern, Summer-2015

Technical Skills

Programming: C++, C, MATLAB, Java, Python
Learning: Tensorflow, PyTorch, Scikit, numpy, Pandas, Theano, Keras
Vision: OpenCV, dlib, Eigen, Blas
Database: Experienced in Microsoft SQL Server, PostgreSQL, MySQL
HDL: Verilog, VHDL, SystemC, Verilog-A

Randomized and heuristic algorithms 100
Machine learning and pattern recognition 81
Scalable search methods in high-dimensional spaces 95
Sampling methods and Monte Carlo 90
Statistical and randomized verification and model checking 95
Designing customized scalable and efficient algorithms and data structures 95


  • S.N.Ahmadyan, S.Vasudevan, S. Natarajan, Every Test Makes a Difference: Compressing Analog Tests to Decrease Production Costs, Asian-Pacific Design Automation Conference, 2016
  • S.N.Ahmadyan, S.Vasudevan, Automated Transient Input Stimuli Generation for Analog Circuits, IEEE Transaction on Computer Aided Design, 2015.
  • S.N.Ahmadyan, S.Vasudevan, S. Natarajan, C. Gu, E. Chiprout, Fast Eye Diagram Analysis for High-Speed CMOS Circuits, Design Automation and Test in Europe (DATE), 2015. (Best paper nomination)
  • J. Asok Kumar,S.N.Ahmadyan, S.Vasudevan, Efficient Statistical Model Checking of Hardware Circuits with Multiple Failure Regions, IEEE Transaction on Computer Aided Design, 2014.
  • S.N.Ahmadyan, S.Vasudevan, Reachability analysis of nonlinear analog circuits through iterative reachable set reduction, 2013 IEEE/ACM International Conference on Design, Automation and Test in Europe (DATE), Grenoble, France, 2013.
  • S.N.Ahmadyan, J. Asok Kumar, S.Vasudevan, Runtime verification of nonlinear analog circuits using incremental time-augmented RRT algorithm, 2013 IEEE/ACM International Conference on Design, Automation and Test in Europe (DATE), Grenoble, France, 2013.
  • S.N.Ahmadyan, J. Asok Kumar, S.Vasudevan, Goal-oriented stimulus generation for analog circuits, in Proceedings of the 49th Design Automation Conference (DAC), 2012.

  • S.N.Ahmadyan, M. Fazeli, N. Farhadi, S.G. Miremadi, Value-aware low-power register file architecture, in Proceedings of the 16th symposium on Computer Architecture and Digital Systems (CADS), 2012. (Best Paper)
  • M. Fazeli, S.N. Ahmadyan, S.G. Miremadi, H. Asadi, M.B. Tahoori, Soft error rate estimation of digital circuits in the presence of multiple event transients (METs), in Proceedings of the IEEE/ACM International Conference on Design, Automation and Test in Europe (DATE), Grenoble, France, 2011.
  • S.N.Ahmadyan, S.G. Miremadi, Fault injection in mixed-signal environment using behavioral fault modeling in Verilog-A, in Proceedings of IEEE Behavioral Modeling and Simulation Conference (BMAS), San Diego, USA, 2010.
  • M. Fazeli, S.G. Miremadi, H. Asadi, S.N. Ahmadyan, A fast and accurate multi-cycle soft error rate estimation approach to resilient embedded systems design, in Proceedings of the 40th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), Chicago, USA, 2010.
  • M. Fazeli, S.N.Ahmadyan, S.G. Miremadi, A low energy soft error-tolerant architecture for the register file in embedded processors , The 11th IEEE High Assurance Systems Engineering Symposium, China, 2008.

  • S.N.Ahmadyan,S.Vasudevan, Efficient Stochastic SAT Solving Using Random Graphs, In workshop of Constrained Formal Verification (CFV-2013), San Francisco, USA, 2013.
  • S.N.Ahmadyan,S.Vasudevan, Rapidly-exploring random forests: algorithms and applications in formal verification of nonlinear analog circuits, In workshop of Frontiers in Analog Circuits (FAC), Berkley, USA, 2013.
  • S.N.Ahmadyan,S.Vasudevan, Verification of Analog Circuits using Rapidly-exploring Random Trees, Information Trust Institue Seminar series, Urbana, USA, 2012.

Honors and Awards

  1. Intel fellowship by UIUC ECE department, 2013
  2. Best Paper Award in 16th symposium on Computer Architecture and Digital Systems (CADS) (2012)
  3. Best Design Award, 1st place in 3rd Sharif digital design and computer architecture competition (2010)
  4. Ranked 8th in iranian national entrance exam for graduate students (2009)
  5. Iranian national Kharazmi scholarship in Computer, the most prestigious scholarship in Iran (2005)